1. Field of the Invention
The present invention relates to a polishing pad for mirror-polishing semiconductor wafers, and to a mirror-polishing method and a mirror-polishing machine which use the polishing pad.
2. Background Art
Conventionally, in a semiconductor-device fabrication process, thin films such as oxide film, metal film, or polycrystal silicon film are layered on a semiconductor wafer in order to form elements thereon. In such a process, when a plurality of wiring layers are formed, the surfaces thereof become uneven, resulting in occurrence of a problem that focusing cannot be performed properly when a fine pattern is exposed and printed on the surface. In order to solve the problem, a so-called CMP (Chemical Mechanical Polishing) technique has been proposed. In relation to the CMP technique, use of a polishing pad having a two-layer structure has been proposed in order to maintain a constant distribution of thickness of films and eliminate fine unevenness on the films (see (Junji Watanabe et al. "The Structure of a Polishing Pad for Polishing while the Surface is Used as a Reference," papers of Spring Meeting, The Japan Society for Precision Engineering, 183 (1997)). In the two-layer polishing pad, the bottom layer is formed of a rubber elastomer in order to remove nonuniformity of polishing stock removal caused by warpage or a large undulation of a wafer itself; and a top layer is formed of hard cloth in order to eliminate unevenness on the wafer surface generated in a semiconductor device fabricating process, to thereby obtain a flat surface.
Meanwhile, in the production of mirror-polished wafers for semiconductor devices, mirror-polishing is performed in order to obtain a desired flatness and surface roughness. In the conventional polishing process, one surface of a semiconductor is rough-polished by use of a hard single-layer polishing pad in order to obtain a desired flatness, and the surface is then finish-polished by use of a single-layer soft polishing pad in order to obtain a desired roughness.
In general, mirror-polishing is performed in a single stage or multiple stages, and a so-called suede-type polishing pad is used in the final or finish polishing. In the suede-type polishing pad, polyurethane is layered on a substrate sheet formed of polyurethane-impregnated polyester felt or the like, a foam layer is grown in the polyurethane, and the surface portion of the foam layer is removed in order to form fluffy openings in the foam layer. When the surface of a semiconductor wafer is removed by an amount of a few to a few hundreds of nano-millimeters through use of such a suede-type polishing pad, surface roughness having a period of a few to a few tens of nano-millimeters (hereinafter may be referred to as "haze") can be improved to a sufficient degree.
By the way, with a recent increase in the degree of integration of semiconductor devices, the requirement for the flatness of wafers has become more strict. Therefore, a conventional polishing method for semiconductor mirror-polished wafers cannot achieve a flatness required for production of state-of-the-art semiconductor devices. Therefore, there has arisen a requirement to maintain a flatness obtained through flatness-improving machining, such as double-side polishing or surface grinding, until completion of final or finish polishing.
Further, since improvement of surface roughness--which is a purpose of finish polishing--can be achieved by finish polishing in which the polishing stock removal has been set to a very small amount as described above, the degradation of flatness due to the finish polishing has been considered ignorable.
In general, the above-described CMP technique is employed in order to achieve uniform polishing stock removal. However, when a two-layer polishing pad having a hard top layer that has conventionally been used in the CMP technique is used, a polished wafer will have a degraded surface roughness. Especially, when such a two-layer polishing pad is used for finish polishing, improvement in the haze level, which is the purpose of the finish polishing, becomes difficult. Further, when a two-layer polishing pad having a top layer formed of a suede-type polishing pad that has conventionally been used for finish polishing is used, undulation is generated in the bottom layer made of rubber elastomer, due to a horizontal force generated during polishing, and the undulation is transferred to the top layer of the polishing pad, resulting in occurrence of a problem that a wafer is polished unevenly in terms of polishing stock removal. Especially, this problem tends to become remarkable in the vicinity of the edge portion of a wafer. Since the top layer is softer than the top layer that has been used in conventional two-layer polishing pads, the top layer exhibits excessively high performance of following undulation of the bottom layer, resulting in degradation in uniformity of polishing stock removal at the peripheral portion of a wafer, which causes a variation in flatness before and after finish polishing.
The inventors of the present invention investigated variations in flatness caused by finish polishing, and found that the flatness can be degraded to a large degree even by finish polishing in which stock removal is very small. Accordingly, the inventors considered that there must be developed a finish polishing method that does not degrade flatness or that can secure uniform polishing stock removal.